Logic Simulation using an Asynchronous Parallel Discrete-Event Simulation Model on a SIMD Machine

Authors

Sharad C. Seth, University of Nebraska-LincolnFollow
Lee Gowen, University of Nebraska-Lincoln
Matt Payne, University of Nebraska-Lincoln
Don Sylwester, University of Nebraska-Lincoln

Date of this Version

1994

Comments

Published in 7th Intetnatlonal Conference on VLSl Deslgn - January 1994 doi: 0.1109/ICVD.1994.282635 Copyright 1994 IEEE. Used by permission.

Abstract

The Chandy-Misra-Bryant (CMB) model has been applied to logic simulation of synchronous sequential circuits using a massively parallel SIMD computer, a CM-2 Connection Machine. Several methods of reducing message traffic in a logic simulation have been adapted to the SIMD architecture of the CM-2, with the result that each method of reducing message traffic actually decreases the speed of the simulation. This suggests that communication costs required to support logic simulation are small compared to the cost of deciding which messages need not be sent.