Electrical & Computer Engineering, Department of
Date of this Version
Fall 12-6-2013
Citation
M.K. Gharzai, Pixel Design of a Smart Camera with Integrated Digital Pixel Sensors Using a 0.13 µm 8-Layer Metal CMOS Process. MS Thesis, University of Nebraska-Lincoln, Lincoln, Nebraska, December 2013
Abstract
The design of cameras has historically kept imagery and computational circuitry isolated in an attempt to maximize image quality by improving pixel pitch and routing density. Although this technique has worked in creating high density arrays of pixels for large resolution imagers, it has never been able to achieve high framerate computational operations.
A radical approach is introduced to solve this dilemma by creating compact, low- power pixel elements with built-in analog-to-digital converters that directly interface with digital logic. These pixels are capable of integrating alongside logic cells and to create an array of pixels inside the processor that can capture a scene and perform operations across the entire image in parallel. Minimization of electronic circuitry is explored to design exotic miniature logic cells to further compact the design and optimize imaging quality.
Adviser: Sina Balkir
Included in
Electrical and Electronics Commons, Electronic Devices and Semiconductor Manufacturing Commons, VLSI and Circuits, Embedded and Hardware Systems Commons
Comments
A THESIS Presented to the Faculty of The Graduate College at the University of Nebraska In Partial Fulfillment of Requirements For the Degree of Master of Science, Major: Electrical Engineering, Under the Supervision of Professor Sina Balkir. Lincoln, Nebraska: December, 2013
Copyright (c) 2013 Mahir Kabeer Gharzai