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Thesis (M.S.)—University of Nebraska—Lincoln, 2006. Department of Electrical Engineering


Copyright 2006, the author. Used by permission.


The continual push for smaller size and decreased power consumption has prompted the adoption of class D amplification for speaker and headphone drivers in portable media devices.With proper design, the power efficiency of this amplifier type can exceed any other topology over the whole output range, even at low output levels.

Simple amplifier topologies are not the norm for these integrated circuit (IC) class D amplifiers.This thesis shows that such complexity is not necessary for good performance.A recently presented simple self-oscillating topology is mapped into a standard CMOS technology and fabricated in a 0.5 micron process. The output stage is optimized for a range of modulation indices, simultaneously increasing average efficiency and reducing chip area.

Modifications are presented that reduce the large transient currents inherent in CMOS inverter chains without increasing implementation complexity.Also, changes to the optimization procedure are presented that make the results more relevant to low-power, self-oscillating topologies.Test results are compared to predicted and simulated values.This thesis shows that design complexity is not requisite for good performance and high efficiency.

Advisor:Michael Hoffman