Computing, School of
School of Computing: Conference and Workshop Papers
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Date of this Version
2007
Document Type
Article
Abstract
For performance-critical microprocessors, efficient test-selection methods are needed for reusing a subset of functional validation tests to detect manufacturing defects. Our new input/output transition fault-coverage metric (TRIO) at the register-transfer level is shown to perform much better than current metric in test selection at only an incrementally higher computational cost. TRIO may also be used for testability analysis early in the design cycle.
Comments
Published in 25th IEEE VLSI Test Symmposium (VTS'07) Copyright © 2007 IEEE. Used by permission.