A Low-power Mixed-signal Potentiostat System-on-Chip with Integrated Dual-slope ADC

Authors

• Seth McRobert, University of Nebraska-LincolnFollow

First Advisor

Sina Balkır

Committee Members

Shubendhu Bhardwaj, Mark Bauer

Date of this Version

12-2025

Document Type

Thesis

Citation

A thesis presented to the faculty of the Graduate College at the University of Nebraska in partial fulfillment of requirements for the degree of Master of Science

Major: Electrical Engineering

Under the supervision of Professor Sina Balkır

Lincoln, Nebraska, December 2025

Comments

Copyright 2025, Seth McRobert. Used by permission

Abstract

This thesis presents the design and characterization of a low-power mixed-signal potentiostat that was integrated with a 65 nm core in a SoC for low-power electrochemical sensing applications. The system integrates a low-noise transimpedance-based potentiostat front end with a 12-bit dual-slope analog-to-digital converter (ADC) for accurate current-to-digital conversion. The potentiostat core—comprising the control amplifier, current-mirror network, and transimpedance amplifier—consumes 38.2 µA from a 2.5 V supply (95.5 µW) and achieves an input-referred noise floor of 113 µVRMS over a 330 Hz bandwidth, while having an input current range from 1 nA to 20 µA and a noise-limited sensitivity of 56.4 pA. The dual-slope ADC analog section draws 26.4 µA from a 2.5 V supply (66 µW) and achieves a sampling rate of 732 Hz, and a sample accuracy with all measured conversion points deviating by no more than 1 LSB from the ideal transfer characteristic. Together, the active measurement path operates at 324 µW, including the overhead due to bias circuits, maintaining sub-milliwatt power while achieving high measurement fidelity. The combined architecture demonstrates stable operation across process variations, validating its suitability for portable electrochemical sensing systems requiring high precision and low-power.

Advisor: Sina Balkır