Physics and Astronomy, Department of



A Dissertation Presented to the Faculty of The Graduate College at the University of Nebraska in Partial Fulfillment of Requirements for the Degree of Doctor of Philosophy; Major: Physics and Astronomy; Under the Supervision of Stephen Ducharme
Lincoln, Nebraska; December, 2007
Copyright © 2007 Timothy James Reece


Ferroelectric field effect transistors (FeFETs) have attracted much attention recently because of their ability to combine high speed, low power consumption, and fast nondestructive readout with the potential for high density nonvolatile memory. The polarization of the ferroelectric is used to switch the channel at the silicon surface between states of high and low conductance.

Among the ferroelectric thin films used in FET devices; the ferroelectric copolymer of Polyvinylidene fluoride, PVDF (C2H2F2), with trifluoroethylene, TrFE (C2HF3), has distinct advantages, including low dielectric constant, low processing temperature, low cost and compatibility with organic semiconductors. By employing the Langmuir-Blodgett technique, films as thin as 1.8 nm can be deposited, reducing the operating voltage. An MFIS structure consisting of aluminum, 170 nm P(VDF-TrFE), 100 nm silicon oxide and n-type silicon exhibited low leakage current (~1×10-8 A/cm2), a large memory window (4.2 V) and operated at 35 Volts. The operating voltage was lowered through use of high k insulators like cerium oxide. A sample consisting of 25 nm P(VDF-TrFE), 30 nm cerium oxide and p-type silicon exhibited a 1.9 V window with 7 Volt gate amplitude. The leakage current in this case was considerably higher (1×10-6 A/cm2). The characterization, modeling, and fabrication of metal-ferroelectric-insulator semiconductor (MFIS) structures based on these films are discussed.

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