Towards a Strong Spin–Orbit Coupling Magnetoelectric Transistor

Authors

Peter Dowben, University of Nebraska - LincolnFollow
Christian Binek, University of Nebraska-LincolnFollow
Kai Zhang, University of Science and Technology of China, Hefei
Lu Wang, University of Science and Technology of China, Hefei
Wai-Ning Mei, University of Nebraska at OmahaFollow
Jonathan P. Bird, University at BuffaloFollow
Uttam Singisetti, University at BuffaloFollow
Xia Hong, University of Nebraska–LincolnFollow
Kang L. Wang, University of California at Los AngelesFollow
Dmitri Nikonov, Intel Corporation, Hillsboro, OregonFollow

Date of this Version

2018

Citation

Published in IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, Vol 4, no 1 (June 2018), 9 pp.

doi 10.1109/JXCDC.2018.2809640

Comments

Copyright © 2018 IEEE. Used by permission.

Abstract

Here, we outline magnetoelectric (ME) device concepts based on the voltage control of the interface magnetism of an ME antiferromagnet gate dielectric formed on a very thin semiconductor channel with large spin–orbit coupling (SOC). The emphasis of the ME spin field-effect transistors (ME spin FET) is on an antiferromagnet spin–orbit read logic device and a ME spin-FET multiplexer. Both spin-FET schemes exploit the strong SOC in the semiconducting channel materials but remain dependent on the voltage-induced switching of an ME, so that the switching time is limited only by the switching dynamics of the ME. The induced exchange field spin polarizes the channel material, breaks time-reversal symmetry, and results in the preferential charge transport direction, due to the spin–orbit-driven spin-momentum locking. These devices could provide reliable room temperature operation with large on/off ratios, well beyond what can be achieved using magnetic tunnel junctions. All of the proposed device spintronic functionalities without the need to switch a ferromagnet, yielding a faster writing speed (~10 ps) at a lower cost in energy (~10 aJ), excellent temperature stability (operational up to 400 K or above), and requiring far fewer device elements (transistor equivalents) than CMOS.